The AI-Driven Memory Supercycle: Surge in DRAM and NAND Prices, Industry Impacts, and the Emergence of HBF Technology
Cyclical Nature of the Memory Industry
The memory industry exhibits distinct cyclical characteristics, having gone through multiple alternating ups and downs. In the first cycle from 2012-2015, the explosive growth of smartphones ignited demand and drove the industry upward, followed by a downturn due to declining PC sales and concentrated production expansion by manufacturers leading to oversupply. The second cycle from 2016-2019 saw upward momentum from Android phone storage capacity upgrades and DRAM supply shortages caused by manufacturers shifting to 3D NAND production, while the subsequent downturn was triggered by large-scale 3D NAND expansion and weak demand in PCs and servers. In the third cycle from 2020-2023, pandemic-induced growth in PC and server demand, along with 5G phone per-device storage upgrades, propelled the industry upward, but repeated pandemic disruptions led to sluggish consumer electronics terminal demand, pushing the industry into another downturn. Starting in 2024, the memory industry has entered a new cycle, with major manufacturers proactively reducing production to optimize supply structure, combined with the AI boom driving surging demand for high-end memory in servers and PCs, jointly propelling the industry into an upward channel.
Logic Behind This Round of Memory Surge
DRAM Price Surge
This round of memory surge began with the explosive rise in DDR4 prices mid-year, resulting from significant supply contraction, resilient demand, market panic, and delays in industry technology iteration.
On the supply side, in 2025, leading manufacturers like Micron and Samsung announced the upcoming end-of-life (EOL) for DDR4, with last-time buy fulfillment rates far below expectations, severely shaking long-term supply confidence. More critically, under the AI boom, HBM and DDR5 became priority directions due to higher profits and suitability for high-end servers. SK Hynix reduced DDR4 capacity to 20%, Samsung planned to halt mainstream capacity DDR4 modules, and domestic manufacturers also shifted toward higher-end products. This irreversible capacity migration led to continuous reduction in effective DDR4 supply.
Demand remained robust: North American internet companies hoarded heavily to control costs and mitigate risks; domestic giants like Alibaba and Tencent saw surging AI server demand driving DDR4 procurement growth; domestic innovation (Xinchuang) servers reverted to DDR4 from DDR5 due to CPU capacity constraints; and cost-sensitive sectors like industrial control, networking, and mid/low-end phones maintained stable annual demand, with advance stocking due to supply concerns. Market sentiment amplified the surge—EOL announcements triggered panic, channel merchants withheld stock, and terminal manufacturers rushed to buy, leading to the “price inversion” where DDR4 prices surpassed DDR5. The transition from DDR4 to DDR5 requires main chip support, creating short-term technological lag that made supply-demand mismatch hard to resolve, ultimately pushing prices to continue soaring.
NAND Turning Point
The core driver for NAND this cycle is the rigid new demand created by AI and fundamental improvements in industry supply-demand structure.
Previously, NAND demand mainly relied on storage upgrades in consumer electronics like phones and PCs, with slow growth vulnerable to consumer weakness. The scaled deployment of AI inference has completely changed this: scenarios like intelligent customer service and autonomous driving require processing massive data, demanding high capacity, speed, and random I/O access. QLC eSSD perfectly fits these needs, becoming the optimal solution for AI applications.
Why Has the AI Boom Lasted So Long, Yet Only Now Reached Memory?
A more accurate question is why DRAM and NAND are only now being impacted, as HBM prices have remained high due to relative monopoly—dominated by SK Hynix, with Micron and Samsung closely following. In the past two years, DRAM and NAND demand did not grow significantly not because of lack of technological progress, but because demand was in an accumulation phase without scaled explosion.
On one hand, AI technology was mostly in model training and small-scale validation stages, with internet giants’ AI products mainly exploratory and testing, penetrating only 20%-30% of business, with limited user volume and interaction frequency. Demand focused on high-performance products like HBM, not spilling over to DRAM and NAND for tiered storage of massive data.
On the other hand, early AI dialogues emphasized quick thinking, relying on internal knowledge bases with low token consumption and no external agent collaboration, limiting data interaction. This year’s sudden demand explosion stems from AI business entering high-penetration phase: internet giants’ AI products have matured and launched, penetration rising to 30%-40%, with products like Doubao seeing massive DAU growth. Traditional internet products in payments and e-commerce are accelerating AI reconstruction, significantly increasing user-AI interaction frequency. Combined with cloud providers’ 3-copy backup mechanisms, data volume grows exponentially, requiring tiered storage via DRAM and NAND, directly boosting demand for both.
Differences from Previous Cycles
First, demand drivers differ: previous cycles were largely tied to manufacturers’ capacity adjustments. While this cycle’s initial DDR4 surge also involved capacity shifts, the core driver is ultra-expected AI server demand. CSP customers not only locked Q4 2025 capacity but pre-ordered for 2026, causing rapid supply-demand imbalance.
Second, inventory and supply-demand status differ: this cycle starts from low inventory—module factories hold only 2 months (normal: 4 months), versus 10-12 months in oversupply. Price rises rely more on strong demand pull than production cuts for de-inventory.
Third, product structure changes: HBM becomes the core growth point with 50%-70% profit margins, consuming 3x the capacity of standard DRAM. Manufacturers prioritize capex toward HBM.
Impact of Memory Price Increases
Which industries are most affected by this memory price surge? Those with rigid memory needs and high memory cost share. The chart below from Morgan Stanley shows memory accounting for 5%-73% of hardware manufacturers’ costs:
Another factor is upstream memory manufacturers’ profitability. For consumer electronics like phones, previously they could lock 70%-80% demand via quarterly LTOs. Now, upstream prioritizes large-order, high-margin AI servers, relegating phone makers to secondary status. Domestic top brands can only secure 80% of next year’s needed memory, second-tier only 60%, facing shortages and market-price pressure on the rest, severely testing supply chains. Phone makers can temporarily maintain margins with inventory average costs, but as inventory depletes, rising costs will amplify pressure. With memory at 10%-15% of BOM and continuing to rise, thin-margin low-end models face greater impact, accelerating industry consolidation toward leaders.
Hardware OEM/ODM sectors also face significant margin pressure from this memory supercycle. While generative AI and data proliferation support long-term demand, NAND and DRAM prices rose 50% and 300% respectively in the past 6 months, sharply increasing input costs (memory 10-70% of BOM). Based on 2016-2018 cycle experience, Morgan Stanley predicts 2026 industry median gross margins down 60%, EPS below consensus by 11%, potentially triggering valuation multiple contraction.
Evolution of Memory Technology
The most watched new memory technology is High Bandwidth Flash (HBF), a novel memory architecture proposed by SanDisk (Western Digital) in February 2025, designed specifically for AI.
Drawing from HBM’s stacking approach and leveraging its CBA technology, it stacks 16 core dies interconnected via through-silicon vias (TSV), matching HBM bandwidth while offering 8-16x capacity at similar cost, with single-stack up to 512GB. Suited for read-intensive AI inference tasks, applicable to on-device large models in phones, autonomous driving, etc. SanDisk plans sample delivery in H2 2026, partnering with SK Hynix for standardization.
The diagram below shows HBF packaged with the processor:
According to official details, HBF advantages include:
High Capacity: 8-16x more than HBM, supporting larger datasets and complex models, ideal for massive memory needs.
Low Cost: Lower per-capacity price than HBM, enabling economical expansion with comparable performance.
Low Power: Excellent power control, especially for read-intensive AI inference, more energy-efficient than HBM.
High Bandwidth and Low Latency: Matches HBM bandwidth, with efficient data processing and low latency, boosting system performance.
Scalability and Applicability: Flash-based, excelling in terminal expansion and large-scale deployment, particularly in unbalanced read-write scenarios.
However, HBF has two critical issues:
First, DRAM has no lifecycle limit, but flash has endurance limits. Integrating flash indistinguishably into GPU—if flash wears out, the expensive GPU board (tens of thousands of dollars) fails.
Second, DRAM operates up to 125°C, flash only 80-85°C, while GPU boards generate high heat—a challenge.
In current architectures, data flow to GPU is SSD/HDD → HBM → GPU, making HBM both compute memory and cache gateway, creating latency bottlenecks.
HBF, directly connected to GPU, can deliver data without passing HBM. This triggers chain reactions: faster token generation → reduced GPU idle time → lower AI total cost of ownership (TCO) → decreased per-unit cost for large language model services.
In other words, HBM + HBF hybrid architecture significantly reduces model inference costs.
Thus, HBF won’t fully replace HBM but will complement it as high-capacity auxiliary memory. Once commercialized, HBM demand growth slope is expected to flatten.